
iGPU
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Posts posted by iGPU
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On 1/22/2021 at 1:40 PM, valmeida said:
Im having an issue downloading and installing 11.2 RC . I have access to Apple Developer Program but it tells me my Mac is up to date even after I enrolled in e the Apple Developer Seed Program . I was able to update my MacBook Pro to 11.2 RC just fine. Im also trying to find a way to download the update using my MacBook into a usb and then run form the USB but don't think there is a link .
I've found that updates don't install properly unless car-active-config is set to 00000000 as shown below. After changing, you must re-boot, then re-try the OS update.
(I keep a set of alternative settings inactivated with a "#" symbol shown as the top of this section.)
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7 hours ago, Arrakis said:
You need to fix bad config file. The error file tells you where the mistakes are located. (I don't use Bootstrap as it messes with BIOS.)
Study OC docs and every line of the sample plist file, as I do. Both usually change with each incremental update. This is the only way you'll learn how to use OC, rather than waiting for someone to hand you the fix.
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1 hour ago, fabiosun said:
Sorry I do not understand well
we have that mb limit and a max resolution on embedded pictures of 1200 pixel for x axis resolution
Could you send on my email that picture to understand better?
Thank you
I logged out and back in again and now the folder uploaded.
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Earlier in this thread, there was some issues with log-in screen being changed after a Big Sur update. This post describes how to fix that issue.
First, a written description and then some images that try to illustrate the words. Attached is a folder containing a Big Sur log-in image; download it and then you must change the UUID to be specific for your system.
Description:
1) Open System Preferences.
2) Select "Users & Groups" --> unlock the padlock --> right click on user --> select 'Advanced' --> copy user UUID from next screen and cancel out of dialog box.
3) Place downloaded folder (Desktop Pictures/UUID/lockscreen.png) into /Library/Caches/
4) Replace folder UUID ("my-UUID") with your UUID copied in step 2.
5) Assign proper writing permission to that folder, using "Get Info", making it Read & Write.
6) After re-booting, you'll now see the BS log-in screen rather than the multi-colored screen (or you can use another image; just re-name as "lock screen.png").
Get your UUID:
Copy your UUID:
Place folder and re-name UUID:
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6 hours ago, iosengineer said:
I have a potentially-interesting finding for you, @Ploddles & @fabiosun:
- First off, I was able to boot with Ploddles' config! Woo-hoo, it's undoubtedly an improvement over my minimally-guide-adapted fork of one of my Intel configs, lol (I'm glad to never use it again).
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Interestingly though, I tried from the start with these three options disabled (AvoidRuntimeDefrag, RebuildAppleMemoryMap, SyncRuntimePermissions), and it did not boot successfully.
- It did get farther than the ultra-early failure I was seeing before [the Err(0xE) one], but fails on the trusty x86_validate_topology!
- I have not yet isolated which of the three flags is required to solve this (running out of time for tonight).
Additionally, I've read the excellent iGPU tutorial on MMIO Whitelisting—a true community service, thank you @iGPU! I hope your recovery has been brisk and total.
That said, even though I like running OpenCore DEBUG and have the boot logs at hand, I've been changing the PCIe config of the machine almost every day this week. In the next couple days, I'll finalize the configuration and MMIO is my top priority before anything else TRX40-Hackintosh-related. Thanks again for the amazing community spirit that all of you are bringing to this forum!
At this late date, why the issue over these Quirks? None of those are necessary. (This is where newbies muddy the waters for no good reason.)
This works and has not changed for months:
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Updated without issue. My sequence was BS ß9 to 11.01 a few days ago, and then today to 11.01 RC (I skipped ß10).
I use the latest OC compile (release v064; now 6a81462) run daily with, of course, the latest, correct, config settings. Kexts are always latest versions.
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1 hour ago, Jaidy said:
Delete the red square entry and your error pos 17 msg will be gone. No longer needed after v062.
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On 10/25/2020 at 1:11 AM, fabiosun said:
For trx40 users (nostalgic users as @iGPUfriend said above) 🙂
Hi all.
I got COVID two weeks ago. I self-treated at home and did well until this past weekend when the "cytokine storm" hit me (I was too conservative with steroid use). A 3-day hospital admission tuned me up and excluded some really serious stuff that I fortunately did not have (DVT/PE). I left hospital today; now back at home and reading this thread on my laptop with supplemental oxygen (and lots of steroids and blood thinners).
BTW, I sero-converted, meaning I now have antibodies to COVID. This means I now have natural immunity with no need for a vaccine. (The idea of herd immunity is to either naturally develop antibodies from COVID directly, or, develop antibodies by receiving a vaccine.)
Hopefully this week I'll get to use the TRX40 again. (Actually, it's been on for past 2 weeks as I was editing a video-documentary on it when I got sick and was unable to easily turn it off. Very stable machine!)
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11 minutes ago, fabiosun said:
thank you @fojerharto let know us how you have solved your interesting problem 🙂
It is always useful also for others to have public conversations and do not worry if the thread is going to mess itself someone provide to recover it in a proper way 🙂
@fojerhar is correct, we would have really cluttered the thread last weekend.
It took many emails and various file exchanges to solve. Once in the correct slots (when we trouble-shoot, we rarely think to try a single GPU in anything other than slot 1), and with an adjusted DSDT, the Firewire card now works well.
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On 10/6/2020 at 12:25 AM, fabiosun said:
12:659 00:000 OCOS: OS set: Apple Inc. macOS 11.0 12:730 00:070 OC: Kext reservation size info 554000 exe 26A000 12:731 00:000 OC: Trying 64-bit XNU hook on boot\System\Library\KernelCollections\BootKernelExtensions.kc 13:195 00:464 OC: Result of 64-bit XNU hook on boot\System\Library\KernelCollections\BootKernelExtensions.kc (00000000) is Success 13:208 00:013 OCAK: Read kernel version 20.1.0 (200100) 13:211 00:002 OCAK: 64-bit algrey - Disable _i386_switch_lbrs base lookup failure Not Found 13:212 00:001 OC: Kernel patcher result 0 for kernel (algrey - Disable _i386_switch_lbrs) - Not Found 13:216 00:004 OCAK: 64-bit algrey - Disable _i386_lbr_init base lookup failure Not Found 13:218 00:001 OC: Kernel patcher result 1 for kernel (algrey - Disable _i386_lbr_init) - Not Found 13:301 00:083 OCAK: 64-bit algrey - _i386_init_slave - Remove wrmsr 0x1c8 replace count - 0 13:302 00:000 OC: Kernel patcher result 2 for kernel (algrey - _i386_init_slave - Remove wrmsr 0x1c8) - Not Found 13:307 00:005 OCAK: 64-bit algrey - Disable _i386_lbr_native_state_to_mach_thread_state base lookup failure Not Found 13:308 00:000 OC: Kernel patcher result 3 for kernel (algrey - Disable _i386_lbr_native_state_to_mach_thread_state) - Not Found 13:313 00:005 OCAK: 64-bit commpage_populate -remove rdmsr replace count - 1 13:314 00:000 OC: Kernel patcher result 4 for kernel (commpage_populate -remove rdmsr) - Success 13:316 00:001 OCAK: 64-bit cpu_topology_sort -disable _x86_validate_topology replace count - 1 13:318 00:001 OC: Kernel patcher result 5 for kernel (cpu_topology_sort -disable _x86_validate_topology) - Success
i am not following anymore on AMD osx discords I can't say if this I am saying here is well known ..
in beta 9 these new patches are not useful anymore to boot fine?
in my case it seems system boot without loading those patches
I need of them in beta 7 and 8
also for you?
Yes, disabling these 4 patches, still allows booting into Big Sur ß6 and ß9 (I have no ß7 or 8 to test), as well as Catalina.
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I initially tried booting TRX40 with Clover (both VM and bare metal) and had no success. OpenCore works so well, I don't see why to use Clover any longer (except for nostalgia).
A couple of weeks ago, I spent time converting other builds (X299 and Z390) completely over to latest OpenCore from Clover. I only go forward with OpenCore.
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On 10/2/2020 at 11:33 AM, fojerhar said:
Thank you
You was right, I was missing the testing with a hard drive.
I did it now, the drive was popped up for me in windows with macdrive, but not in osx.
And yes, in windows everything is fine.
I checked the UAD Apollo 16 interface with my laptop with catalina, and works well trough a TB3-Firewire adaptor (i have only thunderbolts in my MBP 14,3), and the latest driver was not needed for catalina compatibility, and with the trx40 I tried the same and the latest also (i can see at boot, that the UAD kext is loaded at the last step in verbose mode)
and my MBP was the testing hard drive, started in target mode and was working trough adapters in windows. (my old external firewire hd power adaptor is dead)
I also used firewire in the last 8 years without any problems in the hacks z370 and earlier too, thats why this issue is strange for me, should work easily
I would concentrate on getting the Firewire drive to mount in macOS (before working on the UAD device).
Have you tested booting into macOS with the Firewire drive already connected before turning on computer?
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I've spent some time trying to investigate our BIOS for Thunderbolt locations.
For the MSI TRX40 Creator, using a combination of UEFITool and ifrextract, I could localize Thunderbolt sites and extract a text file.
Locate sites:
Extract bin file:
The resulting text file (extraction from above "THUNDRBOLT" search):
SpoilerUEFI Protocol Detected
--------------------------------------------------------------------------------
String Packages
--------------------------------------------------------------------------------
Offset: Language:
--------------------------------------------------------------------------------
0x3824 en-US (0x0)
Form Sets
--------------------------------------------------------------------------------
Offset: Title:
--------------------------------------------------------------------------------
0x54C4 AMD PBS (0x2 from string package 0x0)
Internal Forms Representation
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Offset: Instruction:
--------------------------------------------------------------------------------
0x54C8 Form Set: AMD PBS [B863B959-0EC6-4033-99C1-8FD89F040222], ClassGuid0 [93039971-8545-4B04-B45E-32EB8326040E] {0E A7 59 B9 63 B8 C6 0E 33 40 99 C1 8F D8 9F 04 02 22 02 00 03 00 01 71 99 03 93 45 85 04 4B B4 5E 32 EB 83 26 04 0E}
0x54EF Guid: [0F0B1735-87A0-4193-B266-538C38AF48CE] {5F 15 35 17 0B 0F A0 87 93 41 B2 66 53 8C 38 AF 48 CE 03 01 00}
0x5504 Guid: [0F0B1735-87A0-4193-B266-538C38AF48CE] {5F 15 35 17 0B 0F A0 87 93 41 B2 66 53 8C 38 AF 48 CE 04 00 00}
0x5519 Default Store: , DefaultId: 0x0 {5C 06 00 00 00 00}
0x551F Default Store: , DefaultId: 0x1 {5C 06 00 00 01 00}
0x5525 VarStore: VarStoreId: 0x1 [A339D746-F678-49B3-9FC7-54CE0F9DF226], Size: 0x80, Name: AMD_PBS_SETUP {24 24 46 D7 39 A3 78 F6 B3 49 9F C7 54 CE 0F 9D F2 26 01 00 80 00 41 4D 44 5F 50 42 53 5F 53 45 54 55 50 00}
0x5549 Form: AMD PBS Option, FormId: 0xB {01 86 0B 00 04 00}
0x554F Ref: AMD Firmware Version, VarStoreInfo (VarOffset/VarName): 0xFFFF, VarStore: 0x0, QuestionId: 0x1, FormId: 0xC {0F 0F 44 00 45 00 01 00 00 00 FF FF 00 0C 00}
0x555E Ref: VR Config, VarStoreInfo (VarOffset/VarName): 0xFFFF, VarStore: 0x0, QuestionId: 0x2, FormId: 0xD {0F 0F 60 00 61 00 02 00 00 00 FF FF 00 0D 00}
0x556D Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5574 End {29 02}
0x5576 One Of: Onboard LAN - RTL8111 & RTL8125, VarStoreInfo (VarOffset/VarName): 0x8, VarStore: 0x1, QuestionId: 0x3, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 0B 00 0C 00 03 00 01 00 08 00 10 10 00 01 00}
0x5587 One Of Option: Disabled, Value (8 bit): 0x0 {09 07 07 00 00 00 00}
0x558E One Of Option: Enabled , Value (8 bit): 0x1 (default) {09 07 06 00 10 00 01}
0x5595 End One Of {29 02}
0x5597 One Of: Unused GPP Clocks Off, VarStoreInfo (VarOffset/VarName): 0x0, VarStore: 0x1, QuestionId: 0x4, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 09 00 0A 00 04 00 01 00 00 00 10 10 00 01 00}
0x55A8 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x55AF One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x55B6 End One Of {29 02}
0x55B8 One Of: MITT/WITT Selection, VarStoreInfo (VarOffset/VarName): 0x9, VarStore: 0x1, QuestionId: 0x5, Size: 1, Min: 0x0, Max 0x2, Step: 0x0 {05 91 0D 00 0E 00 05 00 01 00 09 00 10 10 00 02 00}
0x55C9 One Of Option: MITT Only, Value (8 bit): 0x0 {09 07 0F 00 00 00 00}
0x55D0 One Of Option: WITT Only, Value (8 bit): 0x1 {09 07 10 00 00 00 01}
0x55D7 One Of Option: Both disable, Value (8 bit): 0x2 (default) {09 07 11 00 10 00 02}
0x55DE End One Of {29 02}
0x55E0 One Of: Core Voltage VRM Override, VarStoreInfo (VarOffset/VarName): 0x11, VarStore: 0x1, QuestionId: 0x6, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 12 00 13 00 06 00 01 00 11 00 14 10 00 01 00}
0x55F1 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x55F8 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x55FF End One Of {29 02}
0x5601 Suppress If {0A 82}
0x5603 QuestionId: 0x6 equals value 0x0 {12 06 06 00 00 00}
0x5609 Numeric: CoreVoltageVRMOverride Value, VarStoreInfo (VarOffset/VarName): 0x12, VarStore: 0x1, QuestionId: 0x7, Size: 2, Min: 0xF7, Max 0x10F, Step: 0x0 {07 94 14 00 13 00 07 00 01 00 12 00 10 11 F7 00 0F 01 00 00}
0x561D Default: DefaultId: 0x0, Value (16 bit): 0xFF {5B 07 00 00 01 FF 00}
0x5624 End {29 02}
0x5626 End If {29 02}
0x5628 One Of: NVMe RAID mode, VarStoreInfo (VarOffset/VarName): 0x15, VarStore: 0x1, QuestionId: 0x8, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 7A 00 7B 00 08 00 01 00 15 00 10 10 00 01 00}
0x5639 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5640 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5647 End One Of {29 02}
0x5649 One Of: PCIe Slot1 Configuration, VarStoreInfo (VarOffset/VarName): 0x16, VarStore: 0x1, QuestionId: 0x9, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 7C 00 80 00 09 00 01 00 16 00 10 10 00 01 00}
0x565A One Of Option: x8 Mode, Value (8 bit): 0x0 (default) {09 07 83 00 10 00 00}
0x5661 One Of Option: x4x4 Mode, Value (8 bit): 0x1 {09 07 84 00 00 00 01}
0x5668 End One Of {29 02}
0x566A One Of: PCIe Slot3 Configuration, VarStoreInfo (VarOffset/VarName): 0x17, VarStore: 0x1, QuestionId: 0xA, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 7D 00 80 00 0A 00 01 00 17 00 10 10 00 01 00}
0x567B One Of Option: x16 Mode, Value (8 bit): 0x0 (default) {09 07 81 00 10 00 00}
0x5682 One Of Option: x4x4x4x4 Mode, Value (8 bit): 0x1 {09 07 82 00 00 00 01}
0x5689 End One Of {29 02}
0x568B One Of: PCIe Slot5 Configuration, VarStoreInfo (VarOffset/VarName): 0x18, VarStore: 0x1, QuestionId: 0xB, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 7E 00 80 00 0B 00 01 00 18 00 10 10 00 01 00}
0x569C One Of Option: x8 Mode, Value (8 bit): 0x0 (default) {09 07 83 00 10 00 00}
0x56A3 One Of Option: x4x4 Mode, Value (8 bit): 0x1 {09 07 84 00 00 00 01}
0x56AA End One Of {29 02}
0x56AC One Of: PCIe Slot7 Configuration, VarStoreInfo (VarOffset/VarName): 0x19, VarStore: 0x1, QuestionId: 0xC, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 7F 00 80 00 0C 00 01 00 19 00 10 10 00 01 00}
0x56BD One Of Option: x16 Mode, Value (8 bit): 0x0 (default) {09 07 81 00 10 00 00}
0x56C4 One Of Option: x4x4x4x4 Mode, Value (8 bit): 0x1 {09 07 82 00 00 00 01}
0x56CB End One Of {29 02}
0x56CD One Of: PM L1 SS, VarStoreInfo (VarOffset/VarName): 0x22, VarStore: 0x1, QuestionId: 0xD, Size: 1, Min: 0x0, Max 0xFF, Step: 0x0 {05 91 9F 00 A0 00 0D 00 01 00 22 00 14 10 00 FF 00}
0x56DE One Of Option: Auto, Value (8 bit): 0xFF (default) {09 07 08 00 10 00 FF}
0x56E5 One Of Option: Disabled, Value (8 bit): 0x0 {09 07 07 00 00 00 00}
0x56EC One Of Option: L1.1, Value (8 bit): 0x1 {09 07 A1 00 00 00 01}
0x56F3 One Of Option: L1.2, Value (8 bit): 0x2 {09 07 A2 00 00 00 02}
0x56FA One Of Option: L1.1_L1.2, Value (8 bit): 0x3 {09 07 A3 00 00 00 03}
0x5701 End One Of {29 02}
0x5703 One Of: Data Link Feature Exchange, VarStoreInfo (VarOffset/VarName): 0x23, VarStore: 0x1, QuestionId: 0xE, Size: 1, Min: 0x0, Max 0xFF, Step: 0x0 {05 91 A4 00 A5 00 0E 00 01 00 23 00 14 10 00 FF 00}
0x5714 One Of Option: Auto, Value (8 bit): 0xFF (default) {09 07 08 00 10 00 FF}
0x571B One Of Option: Disabled, Value (8 bit): 0x1 {09 07 07 00 00 00 01}
0x5722 One Of Option: Enabled , Value (8 bit): 0x0 {09 07 06 00 00 00 00}
0x5729 End One Of {29 02}
0x572B One Of: M.2 NVMe/SATA Switch (J3800), VarStoreInfo (VarOffset/VarName): 0x24, VarStore: 0x1, QuestionId: 0xF, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 A6 00 A8 00 0F 00 01 00 24 00 10 10 00 01 00}
0x573C One Of Option: M.2 NVMe/PCIe, Value (8 bit): 0x0 (default) {09 07 A9 00 10 00 00}
0x5743 One Of Option: M.2 SATA, Value (8 bit): 0x1 {09 07 AA 00 00 00 01}
0x574A End One Of {29 02}
0x574C One Of: M.2 NVMe/SATA Switch (J3801), VarStoreInfo (VarOffset/VarName): 0x25, VarStore: 0x1, QuestionId: 0x10, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 A7 00 A8 00 10 00 01 00 25 00 10 10 00 01 00}
0x575D One Of Option: M.2 NVMe/PCIe, Value (8 bit): 0x0 (default) {09 07 A9 00 10 00 00}
0x5764 One Of Option: M.2 SATA, Value (8 bit): 0x1 {09 07 AA 00 00 00 01}
0x576B End One Of {29 02}
0x576D One Of: PCIE REDRIVER TX (J3600), VarStoreInfo (VarOffset/VarName): 0x1A, VarStore: 0x1, QuestionId: 0x11, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 85 00 86 00 11 00 01 00 1A 00 14 10 00 01 00}
0x577E One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5785 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x578C End One Of {29 02}
0x578E Suppress If {0A 82}
0x5790 QuestionId: 0x11 equals value 0x0 {12 06 11 00 00 00}
0x5796 One Of: Equalizer Setting (db), VarStoreInfo (VarOffset/VarName): 0x1B, VarStore: 0x1, QuestionId: 0x12, Size: 1, Min: 0x0, Max 0x7, Step: 0x0 {05 91 89 00 8A 00 12 00 01 00 1B 00 14 10 00 07 00}
0x57A7 One Of Option: 0.2_1.0_2.3_5.6, Value (8 bit): 0x0 {09 07 8B 00 00 00 00}
0x57AE One Of Option: 0.2_1.1_2.6_6.2, Value (8 bit): 0x1 (default) {09 07 8C 00 10 00 01}
0x57B5 One Of Option: 1.8_2.7_3.9_7.0, Value (8 bit): 0x2 {09 07 8D 00 00 00 02}
0x57BC One Of Option: 2.1_3.3_4.8_8.5, Value (8 bit): 0x3 {09 07 8E 00 00 00 03}
0x57C3 One Of Option: 3.0_4.2_5.8_9.4, Value (8 bit): 0x4 {09 07 8F 00 00 00 04}
0x57CA One Of Option: 3.2_4.6_6.5_10.4, Value (8 bit): 0x5 {09 07 90 00 00 00 05}
0x57D1 One Of Option: 4.3_5.8_7.8_11.7, Value (8 bit): 0x6 {09 07 91 00 00 00 06}
0x57D8 One Of Option: 4.5_6.5_8.8_13.0, Value (8 bit): 0x7 {09 07 92 00 00 00 07}
0x57DF End One Of {29 02}
0x57E1 One Of: Flat Gain Setting (db), VarStoreInfo (VarOffset/VarName): 0x1C, VarStore: 0x1, QuestionId: 0x13, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 93 00 94 00 13 00 01 00 1C 00 14 10 00 03 00}
0x57F2 One Of Option: -3.5, Value (8 bit): 0x0 {09 07 95 00 00 00 00}
0x57F9 One Of Option: -2, Value (8 bit): 0x1 {09 07 96 00 00 00 01}
0x5800 One Of Option: -0.5, Value (8 bit): 0x2 (default) {09 07 97 00 10 00 02}
0x5807 One Of Option: 1, Value (8 bit): 0x3 {09 07 98 00 00 00 03}
0x580E End One Of {29 02}
0x5810 One Of: Swing Setting (mVp-p), VarStoreInfo (VarOffset/VarName): 0x1D, VarStore: 0x1, QuestionId: 0x14, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 99 00 9A 00 14 00 01 00 1D 00 14 10 00 03 00}
0x5821 One Of Option: 800, Value (8 bit): 0x0 {09 07 9B 00 00 00 00}
0x5828 One Of Option: 1000, Value (8 bit): 0x1 (default) {09 07 9C 00 10 00 01}
0x582F One Of Option: 1100, Value (8 bit): 0x2 {09 07 9D 00 00 00 02}
0x5836 One Of Option: 1200, Value (8 bit): 0x3 {09 07 9E 00 00 00 03}
0x583D End One Of {29 02}
0x583F End If {29 02}
0x5841 One Of: PCIE REDRIVER RX (J3600), VarStoreInfo (VarOffset/VarName): 0x1E, VarStore: 0x1, QuestionId: 0x15, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 87 00 88 00 15 00 01 00 1E 00 14 10 00 01 00}
0x5852 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5859 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5860 End One Of {29 02}
0x5862 Suppress If {0A 82}
0x5864 QuestionId: 0x15 equals value 0x0 {12 06 15 00 00 00}
0x586A One Of: Equalizer Setting (db), VarStoreInfo (VarOffset/VarName): 0x1F, VarStore: 0x1, QuestionId: 0x16, Size: 1, Min: 0x0, Max 0x7, Step: 0x0 {05 91 89 00 8A 00 16 00 01 00 1F 00 14 10 00 07 00}
0x587B One Of Option: 0.2_1.0_2.3_5.6, Value (8 bit): 0x0 {09 07 8B 00 00 00 00}
0x5882 One Of Option: 0.2_1.1_2.6_6.2, Value (8 bit): 0x1 (default) {09 07 8C 00 10 00 01}
0x5889 One Of Option: 1.8_2.7_3.9_7.0, Value (8 bit): 0x2 {09 07 8D 00 00 00 02}
0x5890 One Of Option: 2.1_3.3_4.8_8.5, Value (8 bit): 0x3 {09 07 8E 00 00 00 03}
0x5897 One Of Option: 3.0_4.2_5.8_9.4, Value (8 bit): 0x4 {09 07 8F 00 00 00 04}
0x589E One Of Option: 3.2_4.6_6.5_10.4, Value (8 bit): 0x5 {09 07 90 00 00 00 05}
0x58A5 One Of Option: 4.3_5.8_7.8_11.7, Value (8 bit): 0x6 {09 07 91 00 00 00 06}
0x58AC One Of Option: 4.5_6.5_8.8_13.0, Value (8 bit): 0x7 {09 07 92 00 00 00 07}
0x58B3 End One Of {29 02}
0x58B5 One Of: Flat Gain Setting (db), VarStoreInfo (VarOffset/VarName): 0x20, VarStore: 0x1, QuestionId: 0x17, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 93 00 94 00 17 00 01 00 20 00 14 10 00 03 00}
0x58C6 One Of Option: -3.5, Value (8 bit): 0x0 {09 07 95 00 00 00 00}
0x58CD One Of Option: -2, Value (8 bit): 0x1 {09 07 96 00 00 00 01}
0x58D4 One Of Option: -0.5, Value (8 bit): 0x2 (default) {09 07 97 00 10 00 02}
0x58DB One Of Option: 1, Value (8 bit): 0x3 {09 07 98 00 00 00 03}
0x58E2 End One Of {29 02}
0x58E4 One Of: Swing Setting (mVp-p), VarStoreInfo (VarOffset/VarName): 0x21, VarStore: 0x1, QuestionId: 0x18, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 99 00 9A 00 18 00 01 00 21 00 14 10 00 03 00}
0x58F5 One Of Option: 800, Value (8 bit): 0x0 {09 07 9B 00 00 00 00}
0x58FC One Of Option: 1000, Value (8 bit): 0x1 (default) {09 07 9C 00 10 00 01}
0x5903 One Of Option: 1100, Value (8 bit): 0x2 {09 07 9D 00 00 00 02}
0x590A One Of Option: 1200, Value (8 bit): 0x3 {09 07 9E 00 00 00 03}
0x5911 End One Of {29 02}
0x5913 End If {29 02}
0x5915 One Of: Thunderbolt Support, VarStoreInfo (VarOffset/VarName): 0x26, VarStore: 0x1, QuestionId: 0x849, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 15 00 16 00 49 08 01 00 26 00 14 10 00 01 00}
0x5926 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x592D One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5934 End One Of {29 02}
0x5936 Suppress If {0A 82}
0x5938 QuestionId: 0x849 equals value 0x0 {12 06 49 08 00 00}
0x593E One Of: Thunderbolt Host Chipset, VarStoreInfo (VarOffset/VarName): 0x31, VarStore: 0x1, QuestionId: 0x84A, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 17 00 18 00 4A 08 01 00 31 00 14 10 00 01 00}
0x594F One Of Option: Alpine Ridge, Value (8 bit): 0x0 {09 07 19 00 00 00 00}
0x5956 One Of Option: Titan Ridge, Value (8 bit): 0x1 (default) {09 07 1A 00 10 00 01}
0x595D End One Of {29 02}
0x595F Suppress If {0A 82}
0x5961 QuestionId: 0x84A equals value 0x0 {12 06 4A 08 00 00}
0x5967 One Of: TR HR FPB Capability, VarStoreInfo (VarOffset/VarName): 0x33, VarStore: 0x1, QuestionId: 0x19, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 1B 00 1C 00 19 00 01 00 33 00 14 10 00 01 00}
0x5978 One Of Option: Disabled, Value (8 bit): 0x0 {09 07 07 00 00 00 00}
0x597F One Of Option: Enabled , Value (8 bit): 0x1 (default) {09 07 06 00 10 00 01}
0x5986 End One Of {29 02}
0x5988 End If {29 02}
0x598A One Of: Thunderbolt Security Level, VarStoreInfo (VarOffset/VarName): 0x27, VarStore: 0x1, QuestionId: 0x1A, Size: 1, Min: 0x0, Max 0x4, Step: 0x0 {05 91 1D 00 1E 00 1A 00 01 00 27 00 14 10 00 04 00}
0x599B One Of Option: No Security, Value (8 bit): 0x0 {09 07 1F 00 00 00 00}
0x59A2 One Of Option: User Authorization, Value (8 bit): 0x1 (default) {09 07 20 00 10 00 01}
0x59A9 One Of Option: Secure Connect, Value (8 bit): 0x2 {09 07 21 00 00 00 02}
0x59B0 One Of Option: Display Port and USB, Value (8 bit): 0x3 {09 07 22 00 00 00 03}
0x59B7 Suppress If {0A 82}
0x59B9 QuestionId: 0x84A equals value 0x0 {12 06 4A 08 00 00}
0x59BF One Of Option: USB Docking Only, Value (8 bit): 0x4 {09 07 23 00 00 00 04}
0x59C6 End If {29 02}
0x59C8 End One Of {29 02}
0x59CA One Of: Thunderbolt Force PWR, VarStoreInfo (VarOffset/VarName): 0x28, VarStore: 0x1, QuestionId: 0x1B, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 24 00 25 00 1B 00 01 00 28 00 14 10 00 01 00}
0x59DB One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x59E2 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x59E9 End One Of {29 02}
0x59EB One Of: Thunderbolt Boot From TB, VarStoreInfo (VarOffset/VarName): 0x29, VarStore: 0x1, QuestionId: 0x1C, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 26 00 27 00 1C 00 01 00 29 00 14 10 00 01 00}
0x59FC One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5A03 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5A0A End One Of {29 02}
0x5A0C One Of: Thunderbolt Boot From USB, VarStoreInfo (VarOffset/VarName): 0x2A, VarStore: 0x1, QuestionId: 0x1D, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 28 00 29 00 1D 00 01 00 2A 00 14 10 00 01 00}
0x5A1D One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5A24 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5A2B End One Of {29 02}
0x5A2D One Of: Thunderbolt Assign Resource, VarStoreInfo (VarOffset/VarName): 0x2B, VarStore: 0x1, QuestionId: 0x1E, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 2A 00 2B 00 1E 00 01 00 2B 00 14 10 00 01 00}
0x5A3E One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5A45 One Of Option: After PCI Enumeration, Value (8 bit): 0x1 {09 07 2C 00 00 00 01}
0x5A4C End One Of {29 02}
0x5A4E One Of: Thunderbolt MMIO Resource, VarStoreInfo (VarOffset/VarName): 0x2C, VarStore: 0x1, QuestionId: 0x1F, Size: 1, Min: 0x0, Max 0x2, Step: 0x0 {05 91 2D 00 2E 00 1F 00 01 00 2C 00 14 10 00 02 00}
0x5A5F One Of Option: Full Size, Value (8 bit): 0x0 (default) {09 07 2F 00 10 00 00}
0x5A66 One Of Option: Half Size, Value (8 bit): 0x1 {09 07 30 00 00 00 01}
0x5A6D One Of Option: Three Quarters, Value (8 bit): 0x2 {09 07 31 00 00 00 02}
0x5A74 End One Of {29 02}
0x5A76 One Of: Thunderbolt in SLOT, VarStoreInfo (VarOffset/VarName): 0x2D, VarStore: 0x1, QuestionId: 0x20, Size: 1, Min: 0x1, Max 0x7, Step: 0x0 {05 91 32 00 33 00 20 00 01 00 2D 00 14 10 01 07 00}
0x5A87 One Of Option: PCIE X8 SLOT 1, Value (8 bit): 0x1 {09 07 34 00 00 00 01}
0x5A8E One Of Option: PCIE X16 SLOT 3, Value (8 bit): 0x3 (default) {09 07 35 00 10 00 03}
0x5A95 One Of Option: PCIE X8 SLOT 5, Value (8 bit): 0x5 {09 07 36 00 00 00 05}
0x5A9C One Of Option: PCIE X16 SLOT 7, Value (8 bit): 0x7 {09 07 37 00 00 00 07}
0x5AA3 End One Of {29 02}
0x5AA5 One Of: Legacy/Native/RTD3, VarStoreInfo (VarOffset/VarName): 0x2E, VarStore: 0x1, QuestionId: 0x21, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 38 00 39 00 21 00 01 00 2E 00 14 10 00 03 00}
0x5AB6 One Of Option: Legacy Mode, Value (8 bit): 0x0 {09 07 3A 00 00 00 00}
0x5ABD One Of Option: Native Mode, Value (8 bit): 0x1 (default) {09 07 3B 00 10 00 01}
0x5AC4 One Of Option: Native + RTD3Hot, Value (8 bit): 0x2 {09 07 3C 00 00 00 02}
0x5ACB One Of Option: Native + RTD3Cold, Value (8 bit): 0x3 {09 07 3D 00 00 00 03}
0x5AD2 End One Of {29 02}
0x5AD4 One Of: Thunderbolt L1SS Support, VarStoreInfo (VarOffset/VarName): 0x2F, VarStore: 0x1, QuestionId: 0x22, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 3E 00 3F 00 22 00 01 00 2F 00 14 10 00 01 00}
0x5AE5 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5AEC One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5AF3 End One Of {29 02}
0x5AF5 One Of: Thunderbolt Wake Up Command, VarStoreInfo (VarOffset/VarName): 0x32, VarStore: 0x1, QuestionId: 0x23, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 40 00 41 00 23 00 01 00 32 00 14 10 00 03 00}
0x5B06 One Of Option: Disabled, Value (8 bit): 0x0 {09 07 07 00 00 00 00}
0x5B0D One Of Option: GO2SX Command, Value (8 bit): 0x2 (default) {09 07 42 00 10 00 02}
0x5B14 One Of Option: GO2SX_NO_WAKE Command, Value (8 bit): 0x3 {09 07 43 00 00 00 03}
0x5B1B End One Of {29 02}
0x5B1D End If {29 02}
0x5B1F Suppress If {0A 82}
0x5B21 64 Bit Unsigned Int: 0x1 {45 0A 01 00 00 00 00 00 00 00}
0x5B2B One Of: Thunderbolt in SLOT, VarStoreInfo (VarOffset/VarName): 0x30, VarStore: 0x1, QuestionId: 0x24, Size: 1, Min: 0x0, Max 0x7, Step: 0x0 {05 91 32 00 33 00 24 00 01 00 30 00 14 10 00 07 00}
0x5B3C One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5B43 One Of Option: PCIE X8 SLOT 1, Value (8 bit): 0x1 {09 07 34 00 00 00 01}
0x5B4A One Of Option: PCIE X16 SLOT 3, Value (8 bit): 0x3 {09 07 35 00 00 00 03}
0x5B51 One Of Option: PCIE X8 SLOT 5, Value (8 bit): 0x5 {09 07 36 00 00 00 05}
0x5B58 One Of Option: PCIE X16 SLOT 7, Value (8 bit): 0x7 {09 07 37 00 00 00 07}
0x5B5F End One Of {29 02}
0x5B61 End If {29 02}
0x5B63 End Form {29 02}
0x5B65 Form: AMD Firmware Version, FormId: 0xC {01 86 0C 00 44 00}
0x5B6B Subtitle: Statement.Prompt: AMD Firmware Version, Flags: 0x0 {02 87 44 00 00 00 00}
0x5B72 End {29 02}
0x5B74 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5B7B End {29 02}
0x5B7D Text: Statement.Prompt: AGESA Version, TextTwo: 0 {03 08 58 00 05 00 59 00}
0x5B85 Text: Statement.Prompt: PSP BootLoader Version, TextTwo: 0 {03 08 46 00 05 00 47 00}
0x5B8D Text: Statement.Prompt: PSP SecureOS Version, TextTwo: 0 {03 08 48 00 05 00 49 00}
0x5B95 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5B9C End {29 02}
0x5B9E Text: Statement.Prompt: ABL Version, TextTwo: 0 {03 08 4A 00 05 00 4B 00}
0x5BA6 Text: Statement.Prompt: APCB Version, TextTwo: 0 {03 08 4C 00 05 00 4D 00}
0x5BAE Text: Statement.Prompt: APOB Version, TextTwo: 0 {03 08 4E 00 05 00 4F 00}
0x5BB6 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5BBD End {29 02}
0x5BBF Text: Statement.Prompt: Ucode Patch Version, TextTwo: 0 {03 08 50 00 05 00 51 00}
0x5BC7 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5BCE End {29 02}
0x5BD0 Text: Statement.Prompt: SMU FW Version, TextTwo: 0 {03 08 52 00 05 00 53 00}
0x5BD8 Text: Statement.Prompt: DXIO FW Version, TextTwo: 0 {03 08 54 00 05 00 55 00}
0x5BE0 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5BE7 End {29 02}
0x5BE9 Text: Statement.Prompt: X570/590 Chipset PSP Version, TextTwo: 0 {03 08 5A 00 05 00 5B 00}
0x5BF1 Text: Statement.Prompt: X570/590 Chipset SMU Version, TextTwo: 0 {03 08 5C 00 05 00 5D 00}
0x5BF9 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5C00 End {29 02}
0x5C02 Text: Statement.Prompt: KVM Engine Version, TextTwo: 0 {03 08 5E 00 05 00 5F 00}
0x5C0A Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5C11 End {29 02}
0x5C13 Text: Statement.Prompt: GOP Driver Version, TextTwo: 0 {03 08 56 00 05 00 57 00}
0x5C1B End Form {29 02}
0x5C1D Form: VR Config, FormId: 0xD {01 86 0D 00 60 00}
0x5C23 Subtitle: Statement.Prompt: VR Config, Flags: 0x0 {02 87 60 00 00 00 00}
0x5C2A End {29 02}
0x5C2C Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5C33 End {29 02}
0x5C35 Text: Statement.Prompt: VRM Config Name, TextTwo: N/A {03 08 62 00 05 00 63 00}
0x5C3D Text: Statement.Prompt: VRM Config Revision, TextTwo: N/A {03 08 64 00 05 00 65 00}
0x5C45 Text: Statement.Prompt: VRM Config Valid, TextTwo: N/A {03 08 66 00 05 00 67 00}
0x5C4D Text: Statement.Prompt: MEM AB Config Name, TextTwo: N/A {03 08 68 00 05 00 69 00}
0x5C55 Text: Statement.Prompt: MEM AB Config Revision, TextTwo: N/A {03 08 6A 00 05 00 6B 00}
0x5C5D Text: Statement.Prompt: MEM AB Config Valid, TextTwo: N/A {03 08 6C 00 05 00 6D 00}
0x5C65 Text: Statement.Prompt: SOC Config Name, TextTwo: N/A {03 08 6E 00 05 00 6F 00}
0x5C6D Text: Statement.Prompt: SOC Config Revision, TextTwo: N/A {03 08 70 00 05 00 71 00}
0x5C75 Text: Statement.Prompt: SOC Config Valid, TextTwo: N/A {03 08 72 00 05 00 73 00}
0x5C7D Text: Statement.Prompt: MEM CD Config Name, TextTwo: N/A {03 08 74 00 05 00 75 00}
0x5C85 Text: Statement.Prompt: MEM CD Config Revision, TextTwo: N/A {03 08 76 00 05 00 77 00}
0x5C8D Text: Statement.Prompt: MEM CD Config Valid, TextTwo: N/A {03 08 78 00 05 00 79 00}
0x5C95 End Form {29 02}
0x5C97 End Form Set {29 02}If this file is searched for "THUNDERBOLT", excerpted and re-arranged, the following is seen (included are proposed actions for each site, such as 0x0 to turn off or 0x1 to turn on; some are values for size):
SpoilerBIOS Thunderbolt Configuration
Discrete Thunderbolt Support VarOffset: 0x4EC, VarStore: 0x1
turn on: 0x1
TBT Vt-d base security VarOffset: 0x57E, VarStore: 0x1
turn off: 0x0
Thunderbolt Boot Support VarOffset: 0x4F0, VarStore: 0x1
turn off: 0x0
Titan Ridge Workaround for OSUP VarOffset: 0x515, VarStore: 0x1
turn off: 0x0
Tbt Dynamic AC/DC L1 VarOffset: 0x518, VarStore: 0x1
turn off: 0x0
Wake From TB Devices VarOffset: 0x4F1, VarStore: 0x1
turn off: 0x0
Security Level VarOffset: 0x4F5, VarStore: 0x1
turn off: 0x0
SW SMI on TBT hot-plug VarOffset: 0x4F7, VarStore: 0x1
turn off: 0x0
ACPI Notify on TBT Hot-plug VarOffset: 0x4F9, VarStore: 0x1
turn off: 0x0
Thunderbolt Usb Support VarOffset 0x4EF, VarStore: 0x1
turn off: 0x0
GPIO3 Force Pwr VarOffset: 0x4F2, VarStore: 0x1
turn on: 0x1
Wait time in ms after Force Pwr VarOffset: 0x4F3, VarStore: 0x1
set 200ms: 0xC8
GPIO filter VarOffset: 0x4F8, VarStore: 0x1
turn on: 0x1
CLK REQ VarOffset: 0x4FF, VarStore: 0x1
turn off: 0x0
ASPM VarOffset): 0x500, VarStore: 0x1
turn off: 0x0
LTR VarOffset: 0x501, VarStore: 0x1
turn off: 0x0
PTM VarOffset: 0x517, VarStore: 0x1
turn odd: 0x0
TBT ASPM VarStore: 0x516, VarStore: 0x1
turn off: 0x0
Win 10 Thunderbolt support VarOffset: 0x514, VarStore: 0x1
turn on: 0x1
DTBT Controller 0 VarOffset: 0x4FB, VarStore: 0x1
DTBT Controller 1 VarOffset: 0x4FC, VarStore: 0x1
turn on: 0x1
TBT Host Router VarOffset: 0x502, VarStore: 0x1
TBT Host Router VarOffset: 0x503, VarStore: 0x1
set to 2 ports: 0x2
Extra Bus Reserved VarOffset: 0x504, VarStore: 0x1
Extra Bus Reserved VarOffset: 0x505, VarStore: 0x1
set to 106: 0x6A
Reseved Memory VarOffset: 0x506, VarStore: 0x1
Reseved Memory VarOffset: 0x508, VarStore: 0x1
set to 737: 0x2E1
Memory Alignment VarOffset: 0x50C, VarStore: 0x1
Memory Alignment VarOffset 0x50D, VarStore: 0x1
set to 26: 0x1A
Reserved PMemory VarOffset: 0x50E, VarStore: 0x1
Reserved PMemory VarOffset: 0x510, VarStore: 0x1
set to 1184: 0x4A0
PMemory Alignment VarOffset: 0x512, VarStore: 0x1
PMemory Alignment VarOffset: 0x513, VarStore: 0x1
set to 28: 0x1C
Reserved I/O VarOffset 0x50A, VarStore: 0x1
Reserved I/O VarOffset: 0x50B, VarStore: 0x1
turn off: 0x0
Next, using this data and running a special modified GRUB in an EFI, one should be able to check out these sites and adjust. (I used this tool to modify CFG Lock on Intel BIOS, so it does work.)
However, this is where everything fails on this TRX40 BIOS. I get an error when simply trying to verify the status of the sites in GRUB. I think everything is accurate up to using the modified GRUB tool. (As I could not load nor verify a site, I could change nothing as proposed in the above text file.) I can only assume we need a different modified GRUB.
***
I also studied the BIOS from GB TRX40 Designare. This was decidedly different from the MSI TRX40 Creator, not only in address location, but also the variables. For example, it allows selection between Alpine and Titan Ridge cards.
Detailed extraction from GB TRX40 Designare:
SpoilerUEFI Protocol Detected
--------------------------------------------------------------------------------
String Packages
--------------------------------------------------------------------------------
Offset: Language:
--------------------------------------------------------------------------------
0x3824 en-US (0x0)
Form Sets
--------------------------------------------------------------------------------
Offset: Title:
--------------------------------------------------------------------------------
0x54C4 AMD PBS (0x2 from string package 0x0)
Internal Forms Representation
--------------------------------------------------------------------------------
Offset: Instruction:
--------------------------------------------------------------------------------
0x54C8 Form Set: AMD PBS [B863B959-0EC6-4033-99C1-8FD89F040222], ClassGuid0 [93039971-8545-4B04-B45E-32EB8326040E] {0E A7 59 B9 63 B8 C6 0E 33 40 99 C1 8F D8 9F 04 02 22 02 00 03 00 01 71 99 03 93 45 85 04 4B B4 5E 32 EB 83 26 04 0E}
0x54EF Guid: [0F0B1735-87A0-4193-B266-538C38AF48CE] {5F 15 35 17 0B 0F A0 87 93 41 B2 66 53 8C 38 AF 48 CE 03 01 00}
0x5504 Guid: [0F0B1735-87A0-4193-B266-538C38AF48CE] {5F 15 35 17 0B 0F A0 87 93 41 B2 66 53 8C 38 AF 48 CE 04 00 00}
0x5519 Default Store: , DefaultId: 0x0 {5C 06 00 00 00 00}
0x551F Default Store: , DefaultId: 0x1 {5C 06 00 00 01 00}
0x5525 VarStore: VarStoreId: 0x1 [A339D746-F678-49B3-9FC7-54CE0F9DF226], Size: 0x80, Name: AMD_PBS_SETUP {24 24 46 D7 39 A3 78 F6 B3 49 9F C7 54 CE 0F 9D F2 26 01 00 80 00 41 4D 44 5F 50 42 53 5F 53 45 54 55 50 00}
0x5549 Form: AMD PBS Option, FormId: 0xB {01 86 0B 00 04 00}
0x554F Ref: AMD Firmware Version, VarStoreInfo (VarOffset/VarName): 0xFFFF, VarStore: 0x0, QuestionId: 0x1, FormId: 0xC {0F 0F 44 00 45 00 01 00 00 00 FF FF 00 0C 00}
0x555E Ref: VR Config, VarStoreInfo (VarOffset/VarName): 0xFFFF, VarStore: 0x0, QuestionId: 0x2, FormId: 0xD {0F 0F 60 00 61 00 02 00 00 00 FF FF 00 0D 00}
0x556D Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5574 End {29 02}
0x5576 One Of: Onboard LAN - RTL8111 & RTL8125, VarStoreInfo (VarOffset/VarName): 0x8, VarStore: 0x1, QuestionId: 0x3, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 0B 00 0C 00 03 00 01 00 08 00 10 10 00 01 00}
0x5587 One Of Option: Disabled, Value (8 bit): 0x0 {09 07 07 00 00 00 00}
0x558E One Of Option: Enabled , Value (8 bit): 0x1 (default) {09 07 06 00 10 00 01}
0x5595 End One Of {29 02}
0x5597 One Of: Unused GPP Clocks Off, VarStoreInfo (VarOffset/VarName): 0x0, VarStore: 0x1, QuestionId: 0x4, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 09 00 0A 00 04 00 01 00 00 00 10 10 00 01 00}
0x55A8 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x55AF One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x55B6 End One Of {29 02}
0x55B8 One Of: MITT/WITT Selection, VarStoreInfo (VarOffset/VarName): 0x9, VarStore: 0x1, QuestionId: 0x5, Size: 1, Min: 0x0, Max 0x2, Step: 0x0 {05 91 0D 00 0E 00 05 00 01 00 09 00 10 10 00 02 00}
0x55C9 One Of Option: MITT Only, Value (8 bit): 0x0 {09 07 0F 00 00 00 00}
0x55D0 One Of Option: WITT Only, Value (8 bit): 0x1 {09 07 10 00 00 00 01}
0x55D7 One Of Option: Both disable, Value (8 bit): 0x2 (default) {09 07 11 00 10 00 02}
0x55DE End One Of {29 02}
0x55E0 One Of: Core Voltage VRM Override, VarStoreInfo (VarOffset/VarName): 0x11, VarStore: 0x1, QuestionId: 0x6, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 12 00 13 00 06 00 01 00 11 00 14 10 00 01 00}
0x55F1 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x55F8 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x55FF End One Of {29 02}
0x5601 Suppress If {0A 82}
0x5603 QuestionId: 0x6 equals value 0x0 {12 06 06 00 00 00}
0x5609 Numeric: CoreVoltageVRMOverride Value, VarStoreInfo (VarOffset/VarName): 0x12, VarStore: 0x1, QuestionId: 0x7, Size: 2, Min: 0xF7, Max 0x10F, Step: 0x0 {07 94 14 00 13 00 07 00 01 00 12 00 10 11 F7 00 0F 01 00 00}
0x561D Default: DefaultId: 0x0, Value (16 bit): 0xFF {5B 07 00 00 01 FF 00}
0x5624 End {29 02}
0x5626 End If {29 02}
0x5628 One Of: NVMe RAID mode, VarStoreInfo (VarOffset/VarName): 0x15, VarStore: 0x1, QuestionId: 0x8, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 7A 00 7B 00 08 00 01 00 15 00 10 10 00 01 00}
0x5639 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5640 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5647 End One Of {29 02}
0x5649 One Of: PCIe Slot1 Configuration, VarStoreInfo (VarOffset/VarName): 0x16, VarStore: 0x1, QuestionId: 0x9, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 7C 00 80 00 09 00 01 00 16 00 10 10 00 01 00}
0x565A One Of Option: x8 Mode, Value (8 bit): 0x0 (default) {09 07 83 00 10 00 00}
0x5661 One Of Option: x4x4 Mode, Value (8 bit): 0x1 {09 07 84 00 00 00 01}
0x5668 End One Of {29 02}
0x566A One Of: PCIe Slot3 Configuration, VarStoreInfo (VarOffset/VarName): 0x17, VarStore: 0x1, QuestionId: 0xA, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 7D 00 80 00 0A 00 01 00 17 00 10 10 00 01 00}
0x567B One Of Option: x16 Mode, Value (8 bit): 0x0 (default) {09 07 81 00 10 00 00}
0x5682 One Of Option: x4x4x4x4 Mode, Value (8 bit): 0x1 {09 07 82 00 00 00 01}
0x5689 End One Of {29 02}
0x568B One Of: PCIe Slot5 Configuration, VarStoreInfo (VarOffset/VarName): 0x18, VarStore: 0x1, QuestionId: 0xB, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 7E 00 80 00 0B 00 01 00 18 00 10 10 00 01 00}
0x569C One Of Option: x8 Mode, Value (8 bit): 0x0 (default) {09 07 83 00 10 00 00}
0x56A3 One Of Option: x4x4 Mode, Value (8 bit): 0x1 {09 07 84 00 00 00 01}
0x56AA End One Of {29 02}
0x56AC One Of: PCIe Slot7 Configuration, VarStoreInfo (VarOffset/VarName): 0x19, VarStore: 0x1, QuestionId: 0xC, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 7F 00 80 00 0C 00 01 00 19 00 10 10 00 01 00}
0x56BD One Of Option: x16 Mode, Value (8 bit): 0x0 (default) {09 07 81 00 10 00 00}
0x56C4 One Of Option: x4x4x4x4 Mode, Value (8 bit): 0x1 {09 07 82 00 00 00 01}
0x56CB End One Of {29 02}
0x56CD One Of: PM L1 SS, VarStoreInfo (VarOffset/VarName): 0x22, VarStore: 0x1, QuestionId: 0xD, Size: 1, Min: 0x0, Max 0xFF, Step: 0x0 {05 91 9F 00 A0 00 0D 00 01 00 22 00 14 10 00 FF 00}
0x56DE One Of Option: Auto, Value (8 bit): 0xFF (default) {09 07 08 00 10 00 FF}
0x56E5 One Of Option: Disabled, Value (8 bit): 0x0 {09 07 07 00 00 00 00}
0x56EC One Of Option: L1.1, Value (8 bit): 0x1 {09 07 A1 00 00 00 01}
0x56F3 One Of Option: L1.2, Value (8 bit): 0x2 {09 07 A2 00 00 00 02}
0x56FA One Of Option: L1.1_L1.2, Value (8 bit): 0x3 {09 07 A3 00 00 00 03}
0x5701 End One Of {29 02}
0x5703 One Of: Data Link Feature Exchange, VarStoreInfo (VarOffset/VarName): 0x23, VarStore: 0x1, QuestionId: 0xE, Size: 1, Min: 0x0, Max 0xFF, Step: 0x0 {05 91 A4 00 A5 00 0E 00 01 00 23 00 14 10 00 FF 00}
0x5714 One Of Option: Auto, Value (8 bit): 0xFF (default) {09 07 08 00 10 00 FF}
0x571B One Of Option: Disabled, Value (8 bit): 0x1 {09 07 07 00 00 00 01}
0x5722 One Of Option: Enabled , Value (8 bit): 0x0 {09 07 06 00 00 00 00}
0x5729 End One Of {29 02}
0x572B One Of: M.2 NVMe/SATA Switch (J3800), VarStoreInfo (VarOffset/VarName): 0x24, VarStore: 0x1, QuestionId: 0xF, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 A6 00 A8 00 0F 00 01 00 24 00 10 10 00 01 00}
0x573C One Of Option: M.2 NVMe/PCIe, Value (8 bit): 0x0 (default) {09 07 A9 00 10 00 00}
0x5743 One Of Option: M.2 SATA, Value (8 bit): 0x1 {09 07 AA 00 00 00 01}
0x574A End One Of {29 02}
0x574C One Of: M.2 NVMe/SATA Switch (J3801), VarStoreInfo (VarOffset/VarName): 0x25, VarStore: 0x1, QuestionId: 0x10, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 A7 00 A8 00 10 00 01 00 25 00 10 10 00 01 00}
0x575D One Of Option: M.2 NVMe/PCIe, Value (8 bit): 0x0 (default) {09 07 A9 00 10 00 00}
0x5764 One Of Option: M.2 SATA, Value (8 bit): 0x1 {09 07 AA 00 00 00 01}
0x576B End One Of {29 02}
0x576D One Of: PCIE REDRIVER TX (J3600), VarStoreInfo (VarOffset/VarName): 0x1A, VarStore: 0x1, QuestionId: 0x11, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 85 00 86 00 11 00 01 00 1A 00 14 10 00 01 00}
0x577E One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5785 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x578C End One Of {29 02}
0x578E Suppress If {0A 82}
0x5790 QuestionId: 0x11 equals value 0x0 {12 06 11 00 00 00}
0x5796 One Of: Equalizer Setting (db), VarStoreInfo (VarOffset/VarName): 0x1B, VarStore: 0x1, QuestionId: 0x12, Size: 1, Min: 0x0, Max 0x7, Step: 0x0 {05 91 89 00 8A 00 12 00 01 00 1B 00 14 10 00 07 00}
0x57A7 One Of Option: 0.2_1.0_2.3_5.6, Value (8 bit): 0x0 {09 07 8B 00 00 00 00}
0x57AE One Of Option: 0.2_1.1_2.6_6.2, Value (8 bit): 0x1 (default) {09 07 8C 00 10 00 01}
0x57B5 One Of Option: 1.8_2.7_3.9_7.0, Value (8 bit): 0x2 {09 07 8D 00 00 00 02}
0x57BC One Of Option: 2.1_3.3_4.8_8.5, Value (8 bit): 0x3 {09 07 8E 00 00 00 03}
0x57C3 One Of Option: 3.0_4.2_5.8_9.4, Value (8 bit): 0x4 {09 07 8F 00 00 00 04}
0x57CA One Of Option: 3.2_4.6_6.5_10.4, Value (8 bit): 0x5 {09 07 90 00 00 00 05}
0x57D1 One Of Option: 4.3_5.8_7.8_11.7, Value (8 bit): 0x6 {09 07 91 00 00 00 06}
0x57D8 One Of Option: 4.5_6.5_8.8_13.0, Value (8 bit): 0x7 {09 07 92 00 00 00 07}
0x57DF End One Of {29 02}
0x57E1 One Of: Flat Gain Setting (db), VarStoreInfo (VarOffset/VarName): 0x1C, VarStore: 0x1, QuestionId: 0x13, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 93 00 94 00 13 00 01 00 1C 00 14 10 00 03 00}
0x57F2 One Of Option: -3.5, Value (8 bit): 0x0 {09 07 95 00 00 00 00}
0x57F9 One Of Option: -2, Value (8 bit): 0x1 {09 07 96 00 00 00 01}
0x5800 One Of Option: -0.5, Value (8 bit): 0x2 (default) {09 07 97 00 10 00 02}
0x5807 One Of Option: 1, Value (8 bit): 0x3 {09 07 98 00 00 00 03}
0x580E End One Of {29 02}
0x5810 One Of: Swing Setting (mVp-p), VarStoreInfo (VarOffset/VarName): 0x1D, VarStore: 0x1, QuestionId: 0x14, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 99 00 9A 00 14 00 01 00 1D 00 14 10 00 03 00}
0x5821 One Of Option: 800, Value (8 bit): 0x0 {09 07 9B 00 00 00 00}
0x5828 One Of Option: 1000, Value (8 bit): 0x1 (default) {09 07 9C 00 10 00 01}
0x582F One Of Option: 1100, Value (8 bit): 0x2 {09 07 9D 00 00 00 02}
0x5836 One Of Option: 1200, Value (8 bit): 0x3 {09 07 9E 00 00 00 03}
0x583D End One Of {29 02}
0x583F End If {29 02}
0x5841 One Of: PCIE REDRIVER RX (J3600), VarStoreInfo (VarOffset/VarName): 0x1E, VarStore: 0x1, QuestionId: 0x15, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 87 00 88 00 15 00 01 00 1E 00 14 10 00 01 00}
0x5852 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5859 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5860 End One Of {29 02}
0x5862 Suppress If {0A 82}
0x5864 QuestionId: 0x15 equals value 0x0 {12 06 15 00 00 00}
0x586A One Of: Equalizer Setting (db), VarStoreInfo (VarOffset/VarName): 0x1F, VarStore: 0x1, QuestionId: 0x16, Size: 1, Min: 0x0, Max 0x7, Step: 0x0 {05 91 89 00 8A 00 16 00 01 00 1F 00 14 10 00 07 00}
0x587B One Of Option: 0.2_1.0_2.3_5.6, Value (8 bit): 0x0 {09 07 8B 00 00 00 00}
0x5882 One Of Option: 0.2_1.1_2.6_6.2, Value (8 bit): 0x1 (default) {09 07 8C 00 10 00 01}
0x5889 One Of Option: 1.8_2.7_3.9_7.0, Value (8 bit): 0x2 {09 07 8D 00 00 00 02}
0x5890 One Of Option: 2.1_3.3_4.8_8.5, Value (8 bit): 0x3 {09 07 8E 00 00 00 03}
0x5897 One Of Option: 3.0_4.2_5.8_9.4, Value (8 bit): 0x4 {09 07 8F 00 00 00 04}
0x589E One Of Option: 3.2_4.6_6.5_10.4, Value (8 bit): 0x5 {09 07 90 00 00 00 05}
0x58A5 One Of Option: 4.3_5.8_7.8_11.7, Value (8 bit): 0x6 {09 07 91 00 00 00 06}
0x58AC One Of Option: 4.5_6.5_8.8_13.0, Value (8 bit): 0x7 {09 07 92 00 00 00 07}
0x58B3 End One Of {29 02}
0x58B5 One Of: Flat Gain Setting (db), VarStoreInfo (VarOffset/VarName): 0x20, VarStore: 0x1, QuestionId: 0x17, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 93 00 94 00 17 00 01 00 20 00 14 10 00 03 00}
0x58C6 One Of Option: -3.5, Value (8 bit): 0x0 {09 07 95 00 00 00 00}
0x58CD One Of Option: -2, Value (8 bit): 0x1 {09 07 96 00 00 00 01}
0x58D4 One Of Option: -0.5, Value (8 bit): 0x2 (default) {09 07 97 00 10 00 02}
0x58DB One Of Option: 1, Value (8 bit): 0x3 {09 07 98 00 00 00 03}
0x58E2 End One Of {29 02}
0x58E4 One Of: Swing Setting (mVp-p), VarStoreInfo (VarOffset/VarName): 0x21, VarStore: 0x1, QuestionId: 0x18, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 99 00 9A 00 18 00 01 00 21 00 14 10 00 03 00}
0x58F5 One Of Option: 800, Value (8 bit): 0x0 {09 07 9B 00 00 00 00}
0x58FC One Of Option: 1000, Value (8 bit): 0x1 (default) {09 07 9C 00 10 00 01}
0x5903 One Of Option: 1100, Value (8 bit): 0x2 {09 07 9D 00 00 00 02}
0x590A One Of Option: 1200, Value (8 bit): 0x3 {09 07 9E 00 00 00 03}
0x5911 End One Of {29 02}
0x5913 End If {29 02}
0x5915 One Of: Thunderbolt Support, VarStoreInfo (VarOffset/VarName): 0x26, VarStore: 0x1, QuestionId: 0x849, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 15 00 16 00 49 08 01 00 26 00 14 10 00 01 00}
0x5926 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x592D One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5934 End One Of {29 02}
0x5936 Suppress If {0A 82}
0x5938 QuestionId: 0x849 equals value 0x0 {12 06 49 08 00 00}
0x593E One Of: Thunderbolt Host Chipset, VarStoreInfo (VarOffset/VarName): 0x31, VarStore: 0x1, QuestionId: 0x84A, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 17 00 18 00 4A 08 01 00 31 00 14 10 00 01 00}
0x594F One Of Option: Alpine Ridge, Value (8 bit): 0x0 {09 07 19 00 00 00 00}
0x5956 One Of Option: Titan Ridge, Value (8 bit): 0x1 (default) {09 07 1A 00 10 00 01}
0x595D End One Of {29 02}
0x595F Suppress If {0A 82}
0x5961 QuestionId: 0x84A equals value 0x0 {12 06 4A 08 00 00}
0x5967 One Of: TR HR FPB Capability, VarStoreInfo (VarOffset/VarName): 0x33, VarStore: 0x1, QuestionId: 0x19, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 1B 00 1C 00 19 00 01 00 33 00 14 10 00 01 00}
0x5978 One Of Option: Disabled, Value (8 bit): 0x0 {09 07 07 00 00 00 00}
0x597F One Of Option: Enabled , Value (8 bit): 0x1 (default) {09 07 06 00 10 00 01}
0x5986 End One Of {29 02}
0x5988 End If {29 02}
0x598A One Of: Thunderbolt Security Level, VarStoreInfo (VarOffset/VarName): 0x27, VarStore: 0x1, QuestionId: 0x1A, Size: 1, Min: 0x0, Max 0x4, Step: 0x0 {05 91 1D 00 1E 00 1A 00 01 00 27 00 14 10 00 04 00}
0x599B One Of Option: No Security, Value (8 bit): 0x0 {09 07 1F 00 00 00 00}
0x59A2 One Of Option: User Authorization, Value (8 bit): 0x1 (default) {09 07 20 00 10 00 01}
0x59A9 One Of Option: Secure Connect, Value (8 bit): 0x2 {09 07 21 00 00 00 02}
0x59B0 One Of Option: Display Port and USB, Value (8 bit): 0x3 {09 07 22 00 00 00 03}
0x59B7 Suppress If {0A 82}
0x59B9 QuestionId: 0x84A equals value 0x0 {12 06 4A 08 00 00}
0x59BF One Of Option: USB Docking Only, Value (8 bit): 0x4 {09 07 23 00 00 00 04}
0x59C6 End If {29 02}
0x59C8 End One Of {29 02}
0x59CA One Of: Thunderbolt Force PWR, VarStoreInfo (VarOffset/VarName): 0x28, VarStore: 0x1, QuestionId: 0x1B, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 24 00 25 00 1B 00 01 00 28 00 14 10 00 01 00}
0x59DB One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x59E2 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x59E9 End One Of {29 02}
0x59EB One Of: Thunderbolt Boot From TB, VarStoreInfo (VarOffset/VarName): 0x29, VarStore: 0x1, QuestionId: 0x1C, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 26 00 27 00 1C 00 01 00 29 00 14 10 00 01 00}
0x59FC One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5A03 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5A0A End One Of {29 02}
0x5A0C One Of: Thunderbolt Boot From USB, VarStoreInfo (VarOffset/VarName): 0x2A, VarStore: 0x1, QuestionId: 0x1D, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 28 00 29 00 1D 00 01 00 2A 00 14 10 00 01 00}
0x5A1D One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5A24 One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5A2B End One Of {29 02}
0x5A2D One Of: Thunderbolt Assign Resource, VarStoreInfo (VarOffset/VarName): 0x2B, VarStore: 0x1, QuestionId: 0x1E, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 2A 00 2B 00 1E 00 01 00 2B 00 14 10 00 01 00}
0x5A3E One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5A45 One Of Option: After PCI Enumeration, Value (8 bit): 0x1 {09 07 2C 00 00 00 01}
0x5A4C End One Of {29 02}
0x5A4E One Of: Thunderbolt MMIO Resource, VarStoreInfo (VarOffset/VarName): 0x2C, VarStore: 0x1, QuestionId: 0x1F, Size: 1, Min: 0x0, Max 0x2, Step: 0x0 {05 91 2D 00 2E 00 1F 00 01 00 2C 00 14 10 00 02 00}
0x5A5F One Of Option: Full Size, Value (8 bit): 0x0 (default) {09 07 2F 00 10 00 00}
0x5A66 One Of Option: Half Size, Value (8 bit): 0x1 {09 07 30 00 00 00 01}
0x5A6D One Of Option: Three Quarters, Value (8 bit): 0x2 {09 07 31 00 00 00 02}
0x5A74 End One Of {29 02}
0x5A76 One Of: Thunderbolt in SLOT, VarStoreInfo (VarOffset/VarName): 0x2D, VarStore: 0x1, QuestionId: 0x20, Size: 1, Min: 0x1, Max 0x7, Step: 0x0 {05 91 32 00 33 00 20 00 01 00 2D 00 14 10 01 07 00}
0x5A87 One Of Option: PCIE X8 SLOT 1, Value (8 bit): 0x1 {09 07 34 00 00 00 01}
0x5A8E One Of Option: PCIE X16 SLOT 3, Value (8 bit): 0x3 (default) {09 07 35 00 10 00 03}
0x5A95 One Of Option: PCIE X8 SLOT 5, Value (8 bit): 0x5 {09 07 36 00 00 00 05}
0x5A9C One Of Option: PCIE X16 SLOT 7, Value (8 bit): 0x7 {09 07 37 00 00 00 07}
0x5AA3 End One Of {29 02}
0x5AA5 One Of: Legacy/Native/RTD3, VarStoreInfo (VarOffset/VarName): 0x2E, VarStore: 0x1, QuestionId: 0x21, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 38 00 39 00 21 00 01 00 2E 00 14 10 00 03 00}
0x5AB6 One Of Option: Legacy Mode, Value (8 bit): 0x0 {09 07 3A 00 00 00 00}
0x5ABD One Of Option: Native Mode, Value (8 bit): 0x1 (default) {09 07 3B 00 10 00 01}
0x5AC4 One Of Option: Native + RTD3Hot, Value (8 bit): 0x2 {09 07 3C 00 00 00 02}
0x5ACB One Of Option: Native + RTD3Cold, Value (8 bit): 0x3 {09 07 3D 00 00 00 03}
0x5AD2 End One Of {29 02}
0x5AD4 One Of: Thunderbolt L1SS Support, VarStoreInfo (VarOffset/VarName): 0x2F, VarStore: 0x1, QuestionId: 0x22, Size: 1, Min: 0x0, Max 0x1, Step: 0x0 {05 91 3E 00 3F 00 22 00 01 00 2F 00 14 10 00 01 00}
0x5AE5 One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5AEC One Of Option: Enabled , Value (8 bit): 0x1 {09 07 06 00 00 00 01}
0x5AF3 End One Of {29 02}
0x5AF5 One Of: Thunderbolt Wake Up Command, VarStoreInfo (VarOffset/VarName): 0x32, VarStore: 0x1, QuestionId: 0x23, Size: 1, Min: 0x0, Max 0x3, Step: 0x0 {05 91 40 00 41 00 23 00 01 00 32 00 14 10 00 03 00}
0x5B06 One Of Option: Disabled, Value (8 bit): 0x0 {09 07 07 00 00 00 00}
0x5B0D One Of Option: GO2SX Command, Value (8 bit): 0x2 (default) {09 07 42 00 10 00 02}
0x5B14 One Of Option: GO2SX_NO_WAKE Command, Value (8 bit): 0x3 {09 07 43 00 00 00 03}
0x5B1B End One Of {29 02}
0x5B1D End If {29 02}
0x5B1F Suppress If {0A 82}
0x5B21 64 Bit Unsigned Int: 0x1 {45 0A 01 00 00 00 00 00 00 00}
0x5B2B One Of: Thunderbolt in SLOT, VarStoreInfo (VarOffset/VarName): 0x30, VarStore: 0x1, QuestionId: 0x24, Size: 1, Min: 0x0, Max 0x7, Step: 0x0 {05 91 32 00 33 00 24 00 01 00 30 00 14 10 00 07 00}
0x5B3C One Of Option: Disabled, Value (8 bit): 0x0 (default) {09 07 07 00 10 00 00}
0x5B43 One Of Option: PCIE X8 SLOT 1, Value (8 bit): 0x1 {09 07 34 00 00 00 01}
0x5B4A One Of Option: PCIE X16 SLOT 3, Value (8 bit): 0x3 {09 07 35 00 00 00 03}
0x5B51 One Of Option: PCIE X8 SLOT 5, Value (8 bit): 0x5 {09 07 36 00 00 00 05}
0x5B58 One Of Option: PCIE X16 SLOT 7, Value (8 bit): 0x7 {09 07 37 00 00 00 07}
0x5B5F End One Of {29 02}
0x5B61 End If {29 02}
0x5B63 End Form {29 02}
0x5B65 Form: AMD Firmware Version, FormId: 0xC {01 86 0C 00 44 00}
0x5B6B Subtitle: Statement.Prompt: AMD Firmware Version, Flags: 0x0 {02 87 44 00 00 00 00}
0x5B72 End {29 02}
0x5B74 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5B7B End {29 02}
0x5B7D Text: Statement.Prompt: AGESA Version, TextTwo: 0 {03 08 58 00 05 00 59 00}
0x5B85 Text: Statement.Prompt: PSP BootLoader Version, TextTwo: 0 {03 08 46 00 05 00 47 00}
0x5B8D Text: Statement.Prompt: PSP SecureOS Version, TextTwo: 0 {03 08 48 00 05 00 49 00}
0x5B95 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5B9C End {29 02}
0x5B9E Text: Statement.Prompt: ABL Version, TextTwo: 0 {03 08 4A 00 05 00 4B 00}
0x5BA6 Text: Statement.Prompt: APCB Version, TextTwo: 0 {03 08 4C 00 05 00 4D 00}
0x5BAE Text: Statement.Prompt: APOB Version, TextTwo: 0 {03 08 4E 00 05 00 4F 00}
0x5BB6 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5BBD End {29 02}
0x5BBF Text: Statement.Prompt: Ucode Patch Version, TextTwo: 0 {03 08 50 00 05 00 51 00}
0x5BC7 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5BCE End {29 02}
0x5BD0 Text: Statement.Prompt: SMU FW Version, TextTwo: 0 {03 08 52 00 05 00 53 00}
0x5BD8 Text: Statement.Prompt: DXIO FW Version, TextTwo: 0 {03 08 54 00 05 00 55 00}
0x5BE0 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5BE7 End {29 02}
0x5BE9 Text: Statement.Prompt: X570/590 Chipset PSP Version, TextTwo: 0 {03 08 5A 00 05 00 5B 00}
0x5BF1 Text: Statement.Prompt: X570/590 Chipset SMU Version, TextTwo: 0 {03 08 5C 00 05 00 5D 00}
0x5BF9 Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5C00 End {29 02}
0x5C02 Text: Statement.Prompt: KVM Engine Version, TextTwo: 0 {03 08 5E 00 05 00 5F 00}
0x5C0A Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5C11 End {29 02}
0x5C13 Text: Statement.Prompt: GOP Driver Version, TextTwo: 0 {03 08 56 00 05 00 57 00}
0x5C1B End Form {29 02}
0x5C1D Form: VR Config, FormId: 0xD {01 86 0D 00 60 00}
0x5C23 Subtitle: Statement.Prompt: VR Config, Flags: 0x0 {02 87 60 00 00 00 00}
0x5C2A End {29 02}
0x5C2C Subtitle: Statement.Prompt: , Flags: 0x0 {02 87 05 00 00 00 00}
0x5C33 End {29 02}
0x5C35 Text: Statement.Prompt: VRM Config Name, TextTwo: N/A {03 08 62 00 05 00 63 00}
0x5C3D Text: Statement.Prompt: VRM Config Revision, TextTwo: N/A {03 08 64 00 05 00 65 00}
0x5C45 Text: Statement.Prompt: VRM Config Valid, TextTwo: N/A {03 08 66 00 05 00 67 00}
0x5C4D Text: Statement.Prompt: MEM AB Config Name, TextTwo: N/A {03 08 68 00 05 00 69 00}
0x5C55 Text: Statement.Prompt: MEM AB Config Revision, TextTwo: N/A {03 08 6A 00 05 00 6B 00}
0x5C5D Text: Statement.Prompt: MEM AB Config Valid, TextTwo: N/A {03 08 6C 00 05 00 6D 00}
0x5C65 Text: Statement.Prompt: SOC Config Name, TextTwo: N/A {03 08 6E 00 05 00 6F 00}
0x5C6D Text: Statement.Prompt: SOC Config Revision, TextTwo: N/A {03 08 70 00 05 00 71 00}
0x5C75 Text: Statement.Prompt: SOC Config Valid, TextTwo: N/A {03 08 72 00 05 00 73 00}
0x5C7D Text: Statement.Prompt: MEM CD Config Name, TextTwo: N/A {03 08 74 00 05 00 75 00}
0x5C85 Text: Statement.Prompt: MEM CD Config Revision, TextTwo: N/A {03 08 76 00 05 00 77 00}
0x5C8D Text: Statement.Prompt: MEM CD Config Valid, TextTwo: N/A {03 08 78 00 05 00 79 00}
0x5C95 End Form {29 02}
0x5C97 End Form Set {29 02}-
2
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1 hour ago, fojerhar said:
Hi
Got the power cables, didn't help
Ordered the same card as yours, same results
If I didn't wrote, all cards, all ports are working fine all slots under windows, so bios wise and phisically they are okay
ioreg shows, that kext is loaded, but....
tried different smbioses also, installed a new virgin catalina, high sierra also, to an external drive, removed all the kexts, removed everything to basic default at opencore config
at other forum they wrote that this is an amd problem, but not, because it is working for you
nowdays this is our only option with OC isnt it?
https://dortania.github.io/OpenCore-Install-Guide/AMD/zen.html
tried to force load iofirewire.kext at efi, original and olders also (read somewhere for someone the older mavericks kext solved the problem)
my config is attached, if I made a big donkey mistake there....
thank you 🙂
Firewire is natively loaded with macOS (at least through Big Sur); there are no extra kexts to load and there is no impact by usual SMBIOS that we use (I'd recommend iMacPro1,1 as any SMBIOS with an internal GPU is not a good idea with the TRX40 build). I've used Firewire AIC on each of my builds without issue (Intel X99, Z390, X299 and AMD X570, TRX40 with macOS ranging from Mtn Lion to Big Sur). In other words, Firewire just works with macOS.
Further, the OC boot loader has little influence aside from injecting properties via an SSDT or DevProp (well, if you want to boot from a Firewire device, then you must re-calculate the ScanPolicy; but you shouldn't try this until the Firewire port is actually working). Further, an inoperable Firewire device will have nothing to do with AMD or patches. As long as you're booting into macOS, your patches are fine.
I think your problem is related to the type of device you're trying to connect to the Firewire port. And what exactly is/are the Firewire device(s) that you're trying to connect? (Testing with a Firewire hard drive is the most certain method to verify the Firewire connection.)
To clarify so that I understand you, when you boot into Windows, you can connect a Firewire device and use it? If the Windows response is 'yes, I can connect a device to the Firewire port and it works', then it should work in macOS, but with some caveats.
Again, I would suggest connecting an external Firewire hard drive to test. However, If you don't have a hard drive and you're using an audio device, it will require a software driver, supplied by the manufacturer of the audio device, to interface between macOS and the Firewire audio device. If the software driver is not present or not working, then this device will not work under macOS (despite working under Windows because the proper Windows driver was installed). This is why I'd trouble shoot with an external Firewire hard drive, not a complicated audio device. If you insist on testing with an audio device, and you're certain that the driver was installed and the Firewire device won't connect, then it must be a problem with that macOS and the manufacturer's driver. At that point, you'd need to contact the manufacturer of the audio device. If the driver cannot work with Catalina or later, you might have to revert to Mojave or an earlier macOS for compatibility.
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4 hours ago, Rox67er said:
Updated my Big Sur to latest beta and open core 0.6.2 with latest kext. Still trying to solve my sleep issue. In Catalina system just freezes (display stays on only showing wallpaper) but in Big Sur it sleeps and immediately wakes up again. Initially thought usb related but removed all external usb devices without result. Also disabled network wake and toggled USB power in S5.
In "pmset -g log" I found the following, anybody a clue what this D0A1 D0A2 ... is all about?
2020-09-30 23:47:38 +0200 DarkWake DarkWake from Normal Sleep [CDN] : due to D0A1 D0A2 D0A3 D0A4 D0A5 D0A6 D0A7 D0B0 D0B1 D0B2 D0B3 D0B4 D0B5 D0B6 D0B7 D1A0 D1A1 D1A2 D1A3 D1A4 D1A5 D1A6 D1A7 D1B0 D1B1 D/ Using AC (Charge:0%) 8 secs
btw I just deleted my proxmox drive and went full bare metal. 😎👍
D0A1...D1B1 are devices seen in the DSDT file:
I don't see such a listing of devices. When I run the same command, after running Sleep, then awakening again, I see the following (sleep was enabled for about 15 sec, which is what is shown in an excerpt of the results, below).
Spoiler-
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10 hours ago, Jaidy said:
That one has been working without any problems, and swapping the Brio with 920 eradicates the USB issues. This could be an issue with power draw, but its just that this problem does not arise in Manjaro, or with my MacBook Pro (though as the MBP only has two USB ports, it could be that it can provide ample power). So in that sense, it could be an OS issue. There are reports of such problems over the web, and one simple solution is getting a powered hub. Other solutions were more technical of creating a SSDT for USB ports, which after going through a tutorial by RehabMan is a bit too technical for me (plus that is for X299 motherboard, which I am not sure would be the same procedure for Trx40?)..
I don't think an SSDT will help. It sounds more like a Logitech, macOS driver problem. I'd try a powered hub as a work-around; this is the one I use.
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35 minutes ago, meina222 said:
Beta 9 is safe to install. Worked fine just like beta 8.
I too installed ß9 bare metal, but over ß6 (I never installed ß8). Since I'd removed the Snapshot partition, it is not possible to install the partial update (only a full installer can do this). So, I booted into Recovery, re-installed ß6, then updated with the partial ß9 installer downloaded from Apple. I have 2 Big Sur drives, the other one I'm leaving at ß7 (Snapshot was removed on this drive too).
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18 hours ago, Jaidy said:
Is there any one running a Logitech's BRIO 4k webcam?
@Ploddles thanks so much for the updated EFI. It didn't solve the problem, but I shall be able to upgrade to Big Sur when it comes out so that is good 🙂
I'm using the Logitech C920 without issues. I do have it and most things on my desktop connected to an USB Hub which has it's own power. Your OS (whether Mojave, Catalina or BS) should have no bearing on this issue. I don't even think your EFI should much matter on this build, esp if you're using few SSDTs.
Can you plug your old C920 into the same port to verify that it works?
Next, I'd look at Logitech driver issues: are there any special drivers required by Logitech for the BRIO (and did you need to uninstall old drivers for the C920)?
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3 hours ago, fojerhar said:
The DeviceProperties injection is working.
I would expect functionality since drivers are loaded in yours as well as mine:
What does it show when you select Firewire in same SystemInfo section?
Mine shown below:
The above image changes to the following after a Firewire device is connected and turned on (in this case an RME Fireface 800):
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On 9/25/2020 at 12:27 PM, fojerhar said:
Hi, no, still suffering with it.
Now I have an LSI FW643 installed. As I remember, older builds I did not have to do anything special
Thank you
Your card looks like it should be fine. The one I'm using is here.
I've attached an OpenCore DevProp that may help inject some function for your Firewire card (copy and paste it into your DevProp section; then reboot). You'll need to adjust the address using Hackintool as I shown below (I'm including the instructions as I don't know if you've used Hackintool before).
Based on your IORE file, it looks like you're using the card in slot-3. I'm using in slot-2 (but I'm using water-cooled GPUs that expose slot-2, which would otherwise be obscured by the GPU in slot-1).
I don't recall whether you tried in different slots, but if slot 2 (D0A2/D0A9) is not available, perhaps try in slot-4, repeating the instructions below to re-calculate the address for slot-4. In slot-4, it will probably appear at D2A2 in IORE.
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1) Use Hackintool to extract PCIe data into a text file:
Spoiler2) From pcidevices.txt, look for and copy the address for your Firewire card:
Spoiler3) Use this data to adjust the DevProp address in OpenCore for your build (replacing the high-lighted blue section with the correct address; once done, re-boot and see if it works):
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1 hour ago, fojerhar said:
For me the bluetooth was working ootb by the system, but thank you, will give it a try
Edit: bt works fine, and wifi too, funny :), speeds are not the speed of light, but nice success. Who is developing this? just to follow for updates.
and thank you
.... And fabiosun already answered my question ahead 🙂
The drivers are being ported from Linux (here) with OpenIntelWireless/itlwm for Wifi drivers and ~/IntelBluetoothFirmware for BT drivers.
I've been using the drivers on/off as they've progressed over the past year. BT has been working from the start with a gradual expansion of supported chips (read the site for models). Wifi has become better supported than it was a year ago and is simpler to use. I swapped out the BT/Wifi chip and so do not use these drivers on the TRX40 build. I've used them thru VM (where I made posts some months ago on this forum) and on Mojave, Catalina and Big Sur.
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35 minutes ago, Cosmin Batica said:
Everything is moving light speed, amazing.
BUT: Audio is broken, no matter is internal audio or external audio - USB. Sound is played with many interruptions and distorted.
Someone could give me a advice to repair audio? Thanks.
Agreed: no audio from USB. But curiously, the USB Audio interface does light up as if responding to varying audio levels, but nothing is going to the speakers.
Meanwhile, Firewire audio is good, but completely out of sync with the video (on YouTube for example).
Earlier today, I tried the disabling of UpdateDataHub on both Z390 and X299 systems and found little improvement in speed. But I did not check audio on those systems. (I'll recheck later.) I just read Pavo's post above; this would explain the difference between AMD and Intel when disabling UpdateDataHub.
Sigh... back to usual speed.
[Discussion] - TRX40 Bare Metal - Vanilla Patches
in General
Posted · Edited by iGPU
I haven't seen exactly this issue, but did have freezing with some GPUs and WEG. You might try the following (keep a backup of your current config.plist file):
1. Comment out both DeviceProperties/Add (use "#" in front of each entry).
2. Delete the entire "Memory" item under PlatformInfo (it's not needed).
3. Add "-wegbeta" to boot-args section (I only use: keepsyms=1 -wegbeta)
4. Comment out your Kexts/Add section to save it and use the one I edited from your config file. I don't declare any USB port kexts; it really isn't needed for the TRX40 mobo, and I disabled the AMDRyzen kexts which may be interfering, and removed some extra BT kexts.
Hope this helps.
kexts-add.plist.zip